Technological advances have permitted semiconductor integrated circuits to comprise significantly more circuit elements in a given silicon area. Reducing and eliminating defects in the circuit elements has, however, become increasingly more difficult with the increased number of circuit elements. To achieve higher population capacities, circuit designers strive to reduce the size of the individual circuit elements to maximize available die real estate. The reduced size makes these circuit elements increasingly susceptible to defects caused by material impurities during fabrication. Nevertheless, the defects are identifiable upon completion of the integrated circuit fabrication by testing procedures, either at the semiconductor chip level or after complete packaging. Scrapping or discarding defective integrated circuits when defects are identified is economically undesirable, particularly if only a small number of circuit elements are actually defective.
Relying on zero defects in the fabrication of integrated circuits is an unrealistic option. Therefore, redundant circuit elements are provided on integrated circuits to reduce the number of scrapped integrated circuits. If a primary circuit element is determined to be defective, a redundant circuit element is substituted for the defective primary circuit element. Substantial reductions in scrap are achieved by using redundant circuit elements without substantially increasing the cost of the integrated circuit.
One type of integrated circuit device which uses redundant circuit elements is integrated memory circuits, such as dynamic random access memories (DRAMs), static random access memories (SRAMs), video random access memories (VRAMs), and erasable programmable read only memories (EPROMs). Typical integrated memory circuits comprise millions of equivalent memory cells arranged in arrays of addressable rows and columns. The rows and columns of memory cells are the primary circuit elements of the integrated memory circuit. By providing redundant circuit elements, either as rows or columns, defective primary rows, columns, or individual bits can be replaced.
Because the individual primary circuit elements (rows or columns) of an integrated memory circuit are separately addressable, replacing a defective circuit element typically entails blowing fuses or anti-fuses in fuse-controlled programmable circuits to "program" a redundant circuit element to respond to the address of the defective primary circuit element. This process is very effective for permanently replacing defective primary circuit elements.
In the case of DRAMs, for example, a particular memory cell is selected by first providing a unique row address of the row in which the particular memory cell is located and subsequently providing a unique column address of the column in which the particular memory cell is located. Redundancy circuitry must recognize the address of the effective primary circuit element and reroute all signals to the redundant circuit element when the address to the defective primary circuit element is presented by the user. Therefore, a number of fuses or anti-fuses are associated with each redundant circuit element The possible combinations of blown and unblown fuses corresponding to each redundant circuit element represent unique addresses of all primary circuit elements for which a corresponding redundant circuit element may be substituted.
During testing of the DRAM, or other integrated circuit, at the factory, any defective primary circuit elements are identified. A suitable redundant circuit element is selected, and the corresponding fuses or anti-fuses are blown in a predetermined order to represent the address of the defective primary circuit element to be replaced. When using the DRAM, each address provided to the DRAM must be compared to the corresponding fuses or anti-fuses to determine if a redundant match is present. Whenever the redundant match is detected, the primary circuit element is suppressed and the redundant circuit element is activated to perform the required function.
As mentioned above, fuses or anti-fuses can be used in the fuse-controlled programmable circuits. In a DRAM, an anti-fuse is typically a nitrite capacitor which is essentially a normal memory array cell used as a blowable capacitor. Thus, no extra process steps are required in the fabrication of a DRAM to produce an anti-fuse. Unlike the fuse which is open after being blown, the anti-fuse is typically a one-time blowable or programmable element which remains shorted when the circuit is powered down and re-powered up. One problem with an anti-fuse controlled programmable circuit is that once the fuse has been blown (or shorted), current is drawn through the anti-fuse. As more programmable anti-fuse circuits are disposed in an integrated circuit, and programmed by blowing the anti-fuses, the cumulative current drawn through the anti-fuses can be significant and can possibly affect the operation of the integrated circuit.
Conventional anti-fuse controlled programmable circuits use long-L p-channel transistors to pull up anti-fuses. The long-L p-channel transistor effectively decreases the amount of current drawn through a blown (shorted) anti-fuse to ground. Nevertheless, the resulting standby and operating current due to a resistor short between the power rail and ground when anti-fuses have been programmed is still somewhat significant. Moreover, the long-L p-channel transistor of existing anti-fuse structures occupies significant real estate in the integrated circuit. Thus, although the length of the pull-up "long-L" p-channel transistor can be increased to decrease the current drawn between the power rail and ground, the increased length results in even more area being occupied by the long-L p-channel transistors of the anti-fuse controlled programmable circuits.
Therefore, there is a need in the art for an anti-fuse controlled programmable circuit which substantially eliminates or significantly reduces the resulting standby current from blown or programmed anti-fuses. Moreover, there is a need for an improved anti-fuse controlled programmable circuit which occupies less area in the integrated circuit.